Allegro Aware Enhanced Flow

Bringing the Allegro Constraint environment onto the Capture Desktop.

See the full complex Constraint Manager environment missing in the default Capture-Allegro flow. See hierarchically inherited constraint values, details of Classes, ECSets, SCSets and PCSets, XNets and TPoints, right at your Capture Desktop, from within MakeCAP Power.

MakeCAP Power imports a single DCF file from Constraint Manager to become Allegro Aware. Optionally import a Router DSN file to see Allegro TPoints for PinPairs.

MakeCAP Power Features Datasheet (pdf)

TPoint Aware

Include Allegro Topology created TPoints to your PinPairs in Capture Properties.

TPoints are not normally visible in your Capture Netlist. MakeCAP Power’s Allegro Aware flow makes all TPoints visible and available for PinPair definitions and constraints.

XNet Aware

It’s here, XNets in Capture! See, control, and confidently constrain XNets in the Capture environment.

Work with XNets first created easily in Allegro with AutoSetup. XNets are fully visible in MakeCAP Power. Sortable by XNet or by individual Nets, MakeCAP Power shows you all Nets and Pins in the XNet path.

MakeCAP Power displays all connecting series components and safely lets you create PinPairs without incorrectly terminating a PinPair across a series component body.

Full understanding and control of bubbleup guarantees consistent Net-level Properties on all subnets in the extended XNet.

Create Star Pattern PinPairs

Automatically create Star Pattern PinPairs for Matched Timing Constraints.

Perfect for DDR and other Memory Timing, easily choose the Star Pins or Star Components to create Star branched PinPairs, then constrain in Min/Max Prop Delay and Relative Prop Delay Matched Groups.

All PinPair functionality in MakeCAP Power automatically includes TPoint and XNet based PinPairs.

The PinPair Visualizer

Graphically See, Select and Constrain PinPairs for Min/Max Propagation Delay

Revolutionary PinPair Visualizer shows you PinPairs graphically. Select PinPairs with Point-and-Click, apply and see Min/Max Propagation Delay Constraint values graphically. MakeCAP Power writes your Property values directly from the Visualizer.

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Graphically Define Match Group Timing

Enhanced Graphical Rel Prop Match Group Timing in MakeCAP Power lets you draw Timing Design Intent and capture Timing Constraints.

The ultimate enhancement to the Graphical Display in MakeCAP, the MakeCAP Power Timing Display not only shows you the Constraint Timing, it graphically drives the Constraint timing . Draw the timing relationships and MakeCAP Power automatically populates the Rel Prop values and writes the Rel Prop rules.

Make constraining DDR Timing as easy as Point. And. Click.

Display CSet Values

See existing ECSet, SCSet and PCSet values that are defined in Allegro.

CSet values from the Allegro environment are not normally visible on the Capture Desktop.

The Allegro Aware MakeCAP Power environment lets you see all CSet values that exist in Allegro Constraint Manager. Review and check from the convenience of your Capture workplace and MakeCAP Power screen.

Select ECSets

Select the right ECSet for your Capture Nets.

Seeing the existing ECSet values means you can apply the right ECSet to the right Nets in Capture.

Don’t see the ECSet you need? You can create a new ECSet from Capture and associate Nets with it, then create the ECSet property values in Allegro for the new populated and unvalued ECSet netlisted to CM from Capture.

Map Nets to PCSets and SCsets with Class Mapping

See Allegro CSet to Class associations in MakeCAP Power and map Nets to CSets with Class intermediaries.

Adding Nets to Physical and Spacing Classes in MakeCAP Power means those Nets will inherit the CSets associated with those Classes in Constraint Manager. The Allegro Aware Capture desktop lets you see exactly what CSet values are applied to the Allegro Classes and will subsequently apply to the Nets you include in those Classes.

MakeCAP Power lets you easily assign stackup and impedance choices – widths and spacing by Layer – right from the schematic using Class intermediates and their associated CSets. In Allegro, all by Layer constraints can now ONLY be defined through Physical and Spacing CSets.

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Allegro Aware Display of Inherited Properties in Allegro

Inherited hierarchical Allegro Property values can be seen in MakeCAP Power.

Allegro-Capture Backannotation only passes Net-level Property values from CM to Capture. Even though there is a complex collection of hierarchically inherited constraint values present in Constraint Manager, you cannot see them within the default Capture environment.

The Allegro Aware MakeCAP Power environment shows you all existing Allegro hierarchical property values. Don’t work in the dark anymore and assign overriding Net-level properties in Capture when someone has already constrained these Nets in Allegro.

Allegro Aware Display of Allegro sourced non-Deletable Properties

Original Constraint values originated in Allegro cannot be deleted in Capture.

Ever blanked a value in Capture just to still see it present in CM after Netlisting? That's because a constraint value can only be deleted in the tool environment that created it.

MakeCAP Power identifies all Allegro sourced property values. You can override the value from Capture but you can’t delete. MakeCAP Power ensures the Design Intent you think you getting in Capture is the same one you do get in Allegro.

Property ReUse using Property Profiles

Define a collection of Properties, Library them and apply to any Collection of Nets and Parts in any Schematic.

Property Profiles are the ideal and easy way to define a collection of Properties andapply to any Nets and Parts in any schematic.

Using the easy-to-use MakeCAP Property GUI, just create Property values for many Properties and save as a Property Profile. The Property Profile is then available to apply to any collection of Nets or Parts.

Ideal for DDR, Memories, Differential Pairs, Buses and hi-speed Interfaces.

Property Validation

Check Property values for correct syntax and correct CAD Data.

The Capture Property Editor will accept any entries without any DRC checking. The same is true of Update files created in a text editor or Excel and then imported into Capture – no datachecking.

MakeCAP Power’s Validator will check all Property entries that flow into MakeCAP Power from the Capture DSN property database.

MakeCAP Power can also import Update files directly before importing into Capture to check those.

The Validator checks both the property syntax aswell as CAD Data integrity. Does the pin in the PinPair belong to the right Net? If an XNet, are there differing Net values on the subnets that conflict with bubbleup consistency? If an XNet, has a PinPair been created that uses the body of the series component as part of the PinPair (an Allegro violation)?

MakeCAP Power produces a complete time-stamped report of any found errors that you can archive or share on your network.

Write Update Files

Create syntax perfect Update files.

If you use Update Files to inform or collect Property values within your Engineering and Design community, MakeCAP Power will produce them for you. Derived from the MakeCAP Power constraints database, they’re identical to the Properties MakeCAP Power updates in Capture.

Datamining and Reporting

Half the job is seeing your data.

MakeCAP Power has datamining to let you peruse your database textually as well as review it schematically in Capture.

Want to know what pins are in what Net? What Nets on what Part? MakeCAP Power assists the Engineer and Designer in seeing and organizing Design Intent with your Capture database.

MakeCAP Power includes extended built-in database reporting as well as the ability to let you create your own custom reports.

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